I am a Ph.D. student in the School of Integrated Circuits and the Institute for Artificial Intelligence at Peking University, advised by Prof. Bonan Yan. My research lies at the intersection of neuro-symbolic AI, cognitive architectures, and AI chip design. I build hardware/software systems that connect symbolic reasoning, learning-based agents, and custom silicon, with the goal of making intelligent systems more efficient, reliable, and deployable. My strength is combining algorithm-level insight with hands-on chip implementation, including three successful tape-outs and post-silicon validation.

🔥 News

• 2026.05:  🎉🎉 One paper is accepted by ESSERC 2026.
• 2026.04:  🎉🎉 Our FPGA-Gym-v2 and WebAssembly Stack Co-Processor are selected as finalists in the FCCM 2026 Reconfigurable Computing Challenge.
• 2026.03:  🎉🎉 One paper is accepted by ISEDA 2026 (best paper candidate).
• 2026.02:  🎉🎉 One paper is accepted by DAC 2026.
• 2025.05:  🎉🎉 One paper is accepted by ESSERC 2025.
• 2024.11:  🎉🎉 One paper is accepted by HPCA 2025.
• 2024.10:  🎉🎉 One paper is accepted by DATE 2025.
• 2024.07:  🎉🎉 One paper is accepted by NeurIPS-Workshop 2024.

📝 Publications

First-author and Co-first-author Papers

• [ESSERC’26] BSTroM: A 28-nm Processing Unit with Sparse Dataflow & Backward-Sampling Support for Tractable Probabilistic Models, Anjunyi Fan, Hongxiao Zhao, et al.
• [FCCM’26] Reconfigurable Computing Challenge: FPGA-Gym-v2: FPGA-Based RL Environment Acceleration with LLM-Assisted Onboarding, Jiayi Li*, Hongxiao Zhao*, et al.
• [ISEDA’26] CoPU-RL: A Hardware-Friendly Training-Inference Framework for Neuro-Symbolic Reinforcement Learning, Fengyuan Guo*, Hongxiao Zhao*, et al.
• [AICSP] A novel memristor-based method to compute eigenpairs, Hongxiao Zhao, Zezhi Cheng, Chujun Han, Hongxuan Guo, Litao Sun.

Co-author papers

• [DAC’26] C2C-Explorer: An Exploration Framework for Chip-to-Chip Interconnect Architectures in LLM Cloud Computing Systems, Jiayi Li, Di Wu, Qingxu Li, Hongxiao Zhao, et al.
• [FCCM’26] Reconfigurable Computing Challenge: FPGA-Based WebAssembly Stack Co-Processor, Qiuping Wu, Mugeng Liu, Yixuan Zhang, Hongxiao Zhao, et al.
• [DATE’25] PEARL: FPGA-Based Reinforcement Learning Acceleration with Pipelined Parallel Environments, Jiayi Li, Hongxiao Zhao, et al.
• [HPCA’25] PROCA: programmable probabilistic processing unit architecture with accept/reject prediction & multicore pipelining for causal inference, Yihan Fu, Anjunyi Fan, Wenshuo Yue, Hongxiao Zhao, et al.
• [ESSERC’25] A 40nm 48.7F2 Bit 1T2R Resistive Memory Bitcell Array for Adaptive Vector-Symbolic in-Memory Computing, Wenshuo Yue, Zhaokun Jing, Lintao Ye, Tianyao Xiao, Pek Jun Tiw, Yihan Fu, Yuxiang Yang, Mo Guang, Kaiwen Long, Daijing Shi, Hongxiao Zhao, et al.
• [NeurIPS-OWA’24] FPGA-Gym: An FPGA-Accelerated Reinforcement Learning Environment Simulation Framework, Jiayi Li, Hongxiao Zhao, et al.

🎖 Honors and Awards

• 2019.09 - 2023.06, Multiple Course Excellence Awards, Southeast University
• 2022.05, Nanpu Scholarship, Southeast University
• 2021.11, National Undergraduate Electronic Design Contest, Provincial First Prize
• 2020.12, Chinese Undergraduate Mathematics Contest, National First Prize
• 2020.12, The President Scholarship, Southeast University
• 2020.12 and 2021.10, Merit Student, Southeast University

📖 Education

• 2023.09 - Present, Ph.D. Student, Peking University
• 2019.09 - 2023.06, B.Eng., Southeast University

👨🏻‍🎓 Services

• Reviewer, DAC’26.
• Reviewer, Integrated Circuits and Embedded Systems.